Modifying the Design for Non-XC4000E/EX Devices

At this point in the tutorial, you have created or edited the following four schematic files: calc, alu, andblk2, and orblk2. The design, at this point, is suitable for use only in an XC4000E or XC4000EX device. This is because these devices have several advanced features not found in other Xilinx device families. Two of these advanced features are the on-chip memory built into the XC4000E CLB and wide-edge decoders.

RAM Stack Implementation

The RAM stack is implemented using a 16x4 RAM macro from the XC4000E library. Although the stack is 4x4, RAM and ROM are only available in 16x1 or 32x1 increments, so only one fourth of the memory addresses are used. A stack four times as deep could be implemented while still using only two CLBs. An equivalent flip-flop
implementation would require 64 flip-flops or 32 CLBs. In this case, with a stack only four words deep, using the static memory feature of the XC4000E CLB still reduces the stack from eight CLBs to two CLBs.

To view the XC4000E stack implementation, follow these steps:

1. Make sure the STACK symbol is selected in the Calc schematic, and select Right Mouse Button Open Down.
   
   
2. Choose the schematic to modify and click on OK.
   
   
3. On the stack schematic is a RAM16X4S component, which represents four 16x1 synchronous RAMs. Select this component and Open Down into its schematic.
   
   The schematic for RAM16X4S is shown below.
   
   

   Figure 9.44 RAM16X4S, XC4000E Implementation

Using the Device-Independent Register File

The device-independent stack is implemented by replacing the RAM16X4S with a register file that emulates a synchronous RAM with a set of flip-flops and multiplexers. This implementation can be used for any Xilinx device, even one from the XC4000E family.

If you are targeting an XC4000E device, you may skip this section to take advantage of the RAM feature of the XC4000E.

Make the stack a device-independent schematic as follows:

1. Return to the stack schematic and use the left mouse button to select the RAM16X4S.
   
   
2. Select Right Mouse Button Replace Other.
   
   
3. In the Replace Instance dialog box that appears, fill out the fields as indicated in the following figure and click OK.
   
   

   Figure 9.45 Replace Instance Dialog Box

   The RAM16X4S is replaced with the device-independent RAM4_9K as shown below. Note that the label RAM_BLOCK has been removed by Design Architect. Add an INST property to this component in the same manner as was done to the components in the ALU schematic.
   
   

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   NOTE

   If you are targeting a device family other than the XC9000, be sure to run Convert Design on the RAM4_9K schematic as described before.

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   Figure 9.46 Device Independent RAM4_9K

   The unused A3 pin that exists on RAM16X4S does not exist on RAM4_9K. Although the detached GND symbol and net are trimmed during the implementation process, you can clean-up the schematic by deleting them.
   
   
4. To clean-up the schematic, unselect everything by pressing F2, then select Right Mouse Button Delete Selected (or use the stroke 741236987, which looks like an uppercase “D”).
   
   
5. Check and save the updated stack schematic.
   
   

Removing the XC4000E Oscillator

If you are targeting the Calc design to the XC9000 family (or other non-XC4000 family), you must remove the CLOCKGEN circuitry, which includes the OSC4 component, and replace it with an external source.

NOTE

The XC3000 and XC5200 families also have internal, on-chip oscillators. See the CLKGEN3K and CLKGEN5K components to see how these are used. You may choose to replace the CLOCKGEN component with one of these alternative macros with the Replace selection from the Instance pop-up menu, instead of following the instructions below.

1. On the Calc schematic, press F2 to make sure nothing else is selected.
   
   
2. Select the CLOCKGEN component with the left mouse button.
   
   
3. Delete it by selecting Right Mouse Button Delete Selected (or use the stroke 741236987, which looks like an uppercase “D”).
   
   
4. Add components, nets, and labels as shown in the following figure. The IPAD symbol may be selected from the library menu under BY TYPE io, while the BUFG symbol may be selected under BY TYPE buffer.
   
   
5. Check and save the Calc schematic.
   
   Since the CLK signal is now sourced by a pad, it must be generated externally.
   
   

   Figure 9.47 Device-Independent Clock Source