Chapter 8

Translating Flip-flops

This chapter is for Foundation Express users whose current design descriptions include hand-instantiated flip-flops. It explains how to translate these flip-flops to always blocks that can be used with Foundation Express. Read this chapter after you have read the “Functional Descriptions” chapter.

Some of the benefits of translating your hand-instantiated flip-flops to always blocks are listed below.

• Clearer code
  
  The logic of the new module definitions is easier to understand.
  
  
• Continued compatibility
  
  The new design descriptions can use the expanded capabilities of future versions of Foundation Express.
  
  
• Technology independence
  
  Any FPGA library can be used as the target for the synthesis of a Verilog description.
  
  
• Multiple-bit values
  
  

Such values can be registered with a single statement, rather than with multiple flip-flop instantiations.

There are three basic steps to translating a flip-flop to the always syntax.

1. Understand the function of the module.
   
   
2. Determine what parts of the module description provide the flip-flop behavior.
   
   
3. Build an always block that replaces the flip-flop instantiations.
   
   

Steps 2 and 3 are described in detail, with examples, in the following sections.