A bitstream has been created during the Configure stage in Flow Engine. At this point, you are ready to download the bitstream using a parallel download cable or the more versatile XChecker cable connected to your workstation. The XC4000E version of the Calc design is suitable for download into an FPGA demonstration board available from Xilinx.
Downloading is accomplished with Hardware Debugger. To invoke Hardware Debugger, you select Tools 
Hardware Debugger from the menu bar, or click the Hardware Debugger icon on the toolbar. If you are using an XChecker cable, you can also use the Hardware Debugger to read back information from the device to verify both the configuration as well as the state of memories and registers within the device.
Figure 10.29 Hardware Debugger Icon |  |
Hardware Debugger is explained in a separate tutorial. See the CALC Tutorial section of the Hardware Debugger Reference/User Guide. Before starting this tutorial, be sure to select the ver1 rev1 revision of the design in the project view.
