The following versions of software are required to perform this tutorial:
Before beginning the tutorial, set-up your workstation to use Mentor Graphics and XACT Development System software as follows:
You can optionally install the tutorial files when you install the Xilinx/Mentor Graphics interface software. If you have already installed the software, but are not sure whether you specified tutorial installation, check your software installation for a $XILINX/mentor/tutorial directory. This directory contains the tutorial files.
When you create a design object in Mentor Graphics, a directory is created in the project directory with the same name as the design object. This directory contains a schematic directory, symbol files, viewpoint files, and part interfaces. The directory is identified as a design object by the file, design_name.mgc_component.attr, that resides at the same level as the directory which has the name. For example, if you create a schematic named calc, a calc directory is created, and at the same level the file, calc.mgc_component.attr, is created. The calc directory contains all the files that describe calc.
In this tutorial, file names and directory names are in lower case and the design example is referred to as Calc.
You will complete the Calc design in this tutorial. During the tutorial installation, the $XILINX/mentor/tutorial directory is created; design object directories are created; and the tutorial files needed to complete the design are copied to the calc_sch directory. Some of the files you need to complete the tutorial design are not copied, because you create these files in the tutorial. However, solutions directories with all input and output files are provided. They are located in the $XILINX/mentor/tutorial directory and are listed in the following table.
Directory | Description |
---|---|
calc_sch | Schematic (Design Architect) tutorial directory |
calc_4ke | Schematic solution directory for XC4003E-PC84 |
calc_9k | Schematic solution directory for XC95108-PC84 |
calc_sot | Schematic-on-top tutorial directory (uses XC4003E) |
The solution directories contain the design files for the completed tutorial, including schematics, intermediate files, and the bitstream file. Different intermediate files are created for different device families. Do not overwrite any files in the solutions directories.
The calc_sch directory contains the incomplete copy of the tutorial design. The installation program copies a few intermediate files to the calc_sch tutorial directory, and you create the remaining files when you perform the tutorial. As described in a later step, you copy the calc_sch directory to another area and perform the tutorial in this new area. The following table lists and describes the directories and files in the calc_4ke solution directory.
Directory or File Name | Description |
---|---|
calc | Top-level design directory |
control | Design directory for control module |
statmach | Design directory for state controller module |
alu | Design directory for ALU module |
muxblk2 | Design component for arithmetic function in ALU |
andblk2 | Design component for arithmetic function in ALU |
clockgen | System-clock generator |
orblk2 | Design component for arithmetic function in ALU |
xorblk2 | Design component for arithmetic function in ALU |
muxblk5 | Design component for multiplexer arithmetic outputs in ALU |
muxlbk2a | Design component for multiplexer operator function in control |
stack | Design component for stack |
seg7dec | Design component for 7-segment decoder |
debounce | Design component for debounce circuit |
calc.edif | EDIF netlist files created by pld_men2edif |
pld_men2edif.log | pld_men2edif log file |
calc.ngo | Native Generic Object created by EDIF2NGD |
calc_4ke.ucf | User Constraints File |
calc.bld | Design database report generated by NGDBUILD |
calc.ngd | Native Generic Design created by NGDBUILD |
calc.mrp | Mapping report generated by MAP |
calc.pcf | Physical Constraints File created by MAP |
calc_map.ncd | Native Circuit Description created by MAP |
calc.par | Place-and-Route report generated by PAR |
calc.pad | Pinout description generated by PAR |
calc.ncd | Routed NCD file created by PAR |
calc.twr | Timing report generated by Trace (TRCE) |
calc.bit | Configuration bitstream created by BITGEN |
calc.edn | Timing-model EDIF netlist created by NGD2EDIF |
calc_lib/calc | QuickSim timing simulation model created by pld_edif2tim |
pld_edif2tim.log | pld_edif2tim log file |
In addition to the files listed above, there is a file called filename.mgc_component.attr associated with each design component directory. This file identifies the corresponding directory as a Mentor Graphics design component.