Using a constraints file, you can supply constraints information in a textual form. An example of a constraints file is shown below. The example shows the user constraints file, calc_4ke.ucf, that is supplied with this tutorial. The constraints file syntax is the same for all device families.
You may also place location constraints directly on the schematic. For more information, see the “Schematic Design Tutorial” chapter.
The place and route software must be instructed to read and apply the .ucf file when the design is read into the Xilinx Design Manager. The procedure for doing this is detailed later in the “Using the Xilinx Design Manager” section.
Example Constraints File:
# CALC_4KE.UCF
# User constraints file for CALC, XC4003E-PC84
# Uses angle brackets, as per PLD_MEN2EDIF option
NET SWITCH<7> LOC=P19;
NET SWITCH<6> LOC=P20;
NET SWITCH<5> LOC=P23;
NET SWITCH<4> LOC=P24;
NET SWITCH<3> LOC=P25;
NET SWITCH<2> LOC=P26;
NET SWITCH<1> LOC=P27;
NET SWITCH<0> LOC=P28;
NET A LOC=P49;
NET B LOC=P48;
NET C LOC=P47;
NET D LOC=P46;
NET E LOC=P45;
NET F LOC=P50;
NET G LOC=P51;
NET OFL LOC=P41;
NET GAUGE<3> LOC=P61;
NET GAUGE<2> LOC=P62;
NET GAUGE<1> LOC=P65;
NET GAUGE<0> LOC=P66;
NET STACKLED<3> LOC=P57;
NET STACKLED<2> LOC=P58;
NET STACKLED<1> LOC=P59;
NET STACKLED<0> LOC=P60;
NET NOTGBLRESET LOC=P56;
