The Mentor interface accepts netlists in EDIF or XNF format.
You can submit an EDIF Level 2 0 0 netlist based on a design using Unified Libraries components. The following restrictions apply:
The Mentor interface can accept one of the following XNF netlists:
An XNF netlist can represent all or part of a design. To be included in the netlist of a schematic design, a component must be tagged with the FILE property indicating the path name of the XNF file.
If a lower module is expressed in XNF, the top level must be run through EDIF2SIM in order to create a simulation netlist. The lower-level XNF file can not be run through XNF2SIM by itself since its lack of EXT records prevents XNF2SIM from knowing which signals should become module pins.