Chapter 5

Mixed Designs with VHDL on Top

This chapter describes how to use the Mentor Graphics Interface to design with mixed schematic and VHDL designs with VHDL on Top. It contains the following sections:

• “The Design Flow”
  
  
• “Design Entry”
  
  
• “Functional Simulation”
  
  
• “Design Implementation”
  
  
• “Timing Simulation”